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CY37128P84-125JXI

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Manufacturer No:

CY37128P84-125JXI

HK JDW NO:

217-CY37128P84-125JXI

Package:

84-LCC (J-Lead)

Datasheet:

CY37128P84-125JXI

Description:

1.27mm PMIC Ultra37000? Series CY37128 84 Pin 125MHz 5V 84-LCC (J-Lead)

Quantity:

In Stock : 999

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CY37128P84-125JXI Overview


There are 128 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.In the 84-LCC (J-Lead)package, you will find it.The device is programmed with 69 I/O ports.84terminations have been programmed into the device.Its terminal position is QUAD.Power is provided by a supply voltage of 5V volts.It is included in Programmable Logic Devices.It is recommended to package the chip by Tube.Ensure its reliability by operating at [0].Ideally, the chip should be mounted by Surface Mount.In terms of FPGAs, it belongs to the Ultra37000? series.The chip is programmed with 84 pins.The CY37128contains its related parts.As a building block for digital circuits, there are 3800gates.If high efficiency is desired, the supply voltage should be kept at [0].In general, it is recommended to store data in [0].It is mounted by Surface Mount.There are 84pins on it.It operates at a maximum supply voltage of 5.5V volts.Despite its minimal supply voltage of [0], it is capable of operating.This frequency is 125MHz.In total, it contains 8 logic blocks (LABs).The status of input signals is determined by 1dedicated inputs.

CY37128P84-125JXI Features


84-LCC (J-Lead) package
69 I/Os
The operating temperature of -40°C~85°C TA
84 pin count
84 pins
8 logic blocks (LABs)

CY37128P84-125JXI Applications


There are a lot of Cypress Semiconductor Corp CY37128P84-125JXI CPLDs applications.

  • ROM patching
  • State machine design
  • POWER-SAVING MODES
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • ToR/Aggregation/Core Switch and Router
  • Random logic replacement
  • Complex programmable logic devices
  • D/T registers and latches
  • Multiple DIP Switch Replacement
  • Cross-Matrix Switch
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

2. Means of Payment

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East West Bank charge US$30.00 banking fee.
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

CY37128P84-125JXI

technical specifications, attributes, parameters and parts with similar specifications to CY37128P84-125JXI.

  • Type
    Parameter
    Select All
  • Mount

    Surface Mount

  • Mounting Type

    Surface Mount

  • Package / Case

    84-LCC (J-Lead)

  • Number of Pins

    84

  • Operating Temperature

    -40°C~85°C TA

  • Packaging

    Tube

  • Published

    2003

  • Series

    Ultra37000™

  • JESD-609 Code

    e3

  • Part Status

    Obsolete

  • Moisture Sensitivity Level (MSL)

    3 (168 Hours)

  • Number of Terminations

    84

  • Terminal Finish

    Matte Tin (Sn)

  • Subcategory

    Programmable Logic Devices

  • Terminal Position

    QUAD

  • Terminal Form

    J BEND

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    5V

  • Terminal Pitch

    1.27mm

  • Frequency

    125MHz

  • Time@Peak Reflow Temperature-Max (s)

    20

  • Base Part Number

    CY37128

  • Pin Count

    84

  • Operating Supply Voltage

    5V

  • Programmable Type

    In-System Reprogrammable™ (ISR™) CMOS

  • Max Supply Voltage

    5.5V

  • Min Supply Voltage

    4.5V

  • Number of I/O

    69

  • Memory Type

    EEPROM

  • Propagation Delay

    10 ns

  • Turn On Delay Time

    10 ns

  • Number of Gates

    3800

  • Number of Logic Blocks (LABs)

    8

  • Output Function

    MACROCELL

  • Number of Macro Cells

    128

  • JTAG BST

    YES

  • Number of Dedicated Inputs

    1

  • Voltage Supply - Internal

    4.5V~5.5V

  • Length

    29.3116mm

  • Width

    29.3116mm

  • Radiation Hardening

    No

  • RoHS Status

    ROHS3 Compliant

  • Lead Free

    Lead Free

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