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  • EPM7256AEFI256-7N

EPM7256AEFI256-7N

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Manufacturer No:

EPM7256AEFI256-7N

Manufacturer:

Altera

HK JDW NO:

2936-EPM7256AEFI256-7N

Package:

FBGA

Datasheet:

EPM7256AEFI256-7N

Description:

1mm PMIC 256 Pin 166.67MHz 3.3V FBGA

Quantity:

In Stock : 999

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EPM7256AEFI256-7N Overview


There are 256 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).There is a FBGA package containing it.As a result, it has 164 I/O ports programmed.256terminations are programmed into the device.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.The power source is powered by 3.3Vvolts.There is a part included in Programmable Logic Devices.256pins are programmed on the chip.This device is also capable of displaying [0].In digital circuits, there are 5000gates, which act as a basic building block.High efficiency requires a voltage supply of [0].It is recommended that data be stored in [0].This electronic part is mounted in the way of Surface Mount.This board has 256 pins.With a maximum supply voltage of [0], it operates.The minimal supply voltage is 3V.There are 164 programmable I/Os in this system.This frequency is 166.67MHz.It is recommended that the operating temperature exceeds -40°C.A temperature lower than 85°Cis recommended for operation.It is composed of 16 logic blocks (LABs).A maximum frequency of less than 172.4MHzis recommended.Types of programmable logic are divided into EE PLD.

EPM7256AEFI256-7N Features


FBGA package
164 I/Os
256 pin count
256 pins
16 logic blocks (LABs)

EPM7256AEFI256-7N Applications


There are a lot of Altera EPM7256AEFI256-7N CPLDs applications.

  • ROM patching
  • Wide Vin Industrial low power SMPS
  • I/O PORTS (MCU MODULE)
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • State machine control
  • SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
  • Power up sequencing
  • Digital multiplexers
  • Storage Cards and Storage Racks
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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4. Shipping Cost

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FedEx International, 5-7 business days.
The following are some common countries' logistic time.

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Payment Method

The fee is charged according to the rule of PayPal.
East West Bank charge US$30.00 banking fee.
The fee is charged according to the rule of PayPal.
Western Union charge US$0.00 banking fee.

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DHL(www.dhl.com)
From $40.00 basic shipping fee depend on zone and country.
UPS(www.ups.com)
From $40.00 basic shipping fee depend on zone and country.
FedEx(www.fedex.com)
From $40.00 basic shipping fee depend on zone and country.
Registered Mail(www.singpost.com)
From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM7256AEFI256-7N

technical specifications, attributes, parameters and parts with similar specifications to EPM7256AEFI256-7N.

  • Type
    Parameter
    Select All
  • Frequency (Max)

    172.4MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    5000

  • Number of Programmable I/O

    164

  • Number of Logic Blocks (LABs)

    16

  • Speed Grade

    7

  • Output Function

    MACROCELL

  • Number of Macro Cells

    256

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    2.1mm

  • RoHS Status

    RoHS Compliant

  • Factory Lead Time

    10 Weeks

  • Mount

    Surface Mount

  • Package / Case

    FBGA

  • Number of Pins

    256

  • Published

    1998

  • JESD-609 Code

    e1

  • Pbfree Code

    yes

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    256

  • ECCN Code

    3A991

  • Terminal Finish

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Max Operating Temperature

    85°C

  • Min Operating Temperature

    -40°C

  • Additional Feature

    YES

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    3.3V

  • Terminal Pitch

    1mm

  • Frequency

    166.67MHz

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Pin Count

    256

  • Qualification Status

    Not Qualified

  • Operating Supply Voltage

    3.3V

  • Temperature Grade

    INDUSTRIAL

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    164

  • Memory Type

    EEPROM

  • Propagation Delay

    7.5 ns

  • Turn On Delay Time

    7.5 ns

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