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EPM570GM256I5N
  • EPM570GM256I5N
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EPM570GM256I5N

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Manufacturer No:

EPM570GM256I5N

Manufacturer:

Altera

HK JDW NO:

2936-EPM570GM256I5N

Package:

TFBGA

Datasheet:

EPM570GM256I5N

Description:

0.5mm PMIC 256 Pin 1.8797GHz 1.8V TFBGA

Quantity:

Add to RFQ list

In Stock : 999

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EPM570GM256I5N Overview


Currently, there are 440 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.In the TFBGApackage, you will find it.As you can see, this device has 160 I/O ports programmed into it.The termination of a device is set to [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.It is powered by a voltage of 1.8V volts.It is included in Programmable Logic Devices.There are 256 pins on the chip.It is also possible to find IT CAN ALSO OPERATE AT 3.3Vwhen using this device.Optimal efficiency requires a supply voltage of [0].Data is stored using [0].The electronic part is mounted by Surface Mount.This board has 256 pins.A maximum supply voltage of 1.89Vis used in its operation.It operates with the minimal supply voltage of 1.71V.There are 160 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. You can achieve 1.8797GHzfrequencies.In order to operate properly, the operating temperature should be higher than -40°C.A temperature below 100°Cshould be used as the operating temperature.There are 57 logic blocks (LABs) in its basic building block.The fundamental building block consists of 570logic elements/cells.It should be below 304MHzat the maximal frequency.It is possible to store data and programs in the devices' 1kBmemory.

EPM570GM256I5N Features


TFBGA package
160 I/Os
256 pin count
256 pins
57 logic blocks (LABs)

EPM570GM256I5N Applications


There are a lot of Altera EPM570GM256I5N CPLDs applications.

  • Power Meter SMPS
  • Digital designs
  • State machine design
  • TIMERS/COUNTERS
  • Configurable Addressing of I/O Boards
  • Code converters
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • High speed graphics processing
  • White goods (Washing, Cold, Aircon ,...)
  • I/O PORTS (MCU MODULE)
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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3. RFQ (Request for Quotations)

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East West Bank charge US$30.00 banking fee.
The fee is charged according to the rule of PayPal.
Western Union charge US$0.00 banking fee.

Shipping

 DHL(www.dhl.com)
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UPS(www.ups.com)
From $40.00 basic shipping fee depend on zone and country.
FedEx(www.fedex.com)
From $40.00 basic shipping fee depend on zone and country.
Registered Mail(www.singpost.com)
From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM570GM256I5N

technical specifications, attributes, parameters and parts with similar specifications to EPM570GM256I5N.

  • Type
    Parameter
    Select All

  • Min Operating Temperature

    -40°C

  • Additional Feature

    IT CAN ALSO OPERATE AT 3.3V

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    1.8V

  • Terminal Pitch

    0.5mm

  • Frequency

    1.8797GHz

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Pin Count

    256

  • Qualification Status

    Not Qualified

  • Operating Supply Voltage

    1.8V

  • Max Supply Voltage

    1.89V

  • Min Supply Voltage

    1.71V

  • Memory Size

    1kB

  • Operating Supply Current

    40mA

  • Number of I/O

    160

  • Nominal Supply Current

    40mA

  • Memory Type

    FLASH

  • Propagation Delay

    8.7 ns

  • Frequency (Max)

    304MHz

  • Number of Logic Elements/Cells

    570

  • Number of Programmable I/O

    160

  • Number of Logic Blocks (LABs)

    57

  • Output Function

    MACROCELL

  • Number of Macro Cells

    440

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • RoHS Status

    RoHS Compliant

  • Factory Lead Time

    10 Weeks

  • Mount

    Surface Mount

  • Package / Case

    TFBGA

  • Number of Pins

    256

  • Published

    2014

  • JESD-609 Code

    e1

  • Pbfree Code

    yes

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    256

  • ECCN Code

    EAR99

  • Terminal Finish

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Max Operating Temperature

    100°C

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