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Home Home Integrated Circuits (ICs) CPLDs EPM240GM100I5N
EPM240GM100I5N
  • EPM240GM100I5N
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EPM240GM100I5N

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Manufacturer No:

EPM240GM100I5N

Manufacturer:

Altera

HK JDW NO:

2936-EPM240GM100I5N

Package:

TFBGA

Datasheet:

EPM240GM100I5N

Description:

PMIC 100 Pin 1.8797GHz 1.8V TFBGA

Quantity:

Add to RFQ list

In Stock : 999

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EPM240GM100I5N Overview


192 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.It is part of the TFBGA package.The device has 80inputs and outputs.It is programmed that device terminations will be 100 .Its terminal position is BOTTOM.The device is powered by a voltage of 1.8V volts.It is a part of the family [0].There are 100 pins on the chip.It is also characterized by IT CAN ALSO OPERATE AT 3.3V.The supply voltage should be maintained at 1.8V for high efficiency.It is adopted to store data in [0].Surface Mountis used to mount this electronic component.100pins are included in its design.It operates with the maximal supply voltage of 1.89V.Normally, it operates with a voltage of 1.71VV as its minimum supply voltage.A total of 80 Programmable I/Os are available.You can achieve 1.8797GHzfrequencies.In order to operate properly, the operating temperature should be higher than -40°C.A temperature lower than 100°Cis recommended for operation.There are 24logic blocks (LABs) that make up its basic building block.There are 240 logic elements/cells to form a fundamental building block. There should be a lower maximum frequency than 304MHz.It is possible to store data and programs in the devices' 1kBmemory.

EPM240GM100I5N Features


TFBGA package
80 I/Os
100 pin count
100 pins
24 logic blocks (LABs)

EPM240GM100I5N Applications


There are a lot of Altera EPM240GM100I5N CPLDs applications.

  • Page register
  • Voltage level translation
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • Boolean function generators
  • Field programmable gate
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Wide Vin Industrial low power SMPS
  • Pattern recognition
  • Configurable Addressing of I/O Boards
  • State machine design
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM240GM100I5N

technical specifications, attributes, parameters and parts with similar specifications to EPM240GM100I5N.

  • Type
    Parameter
    Select All

  • Factory Lead Time

    8 Weeks

  • Mount

    Surface Mount

  • Package / Case

    TFBGA

  • Number of Pins

    100

  • Published

    2007

  • JESD-609 Code

    e1

  • Pbfree Code

    yes

  • Part Status

    Active

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    100

  • ECCN Code

    EAR99

  • Terminal Finish

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Max Operating Temperature

    100°C

  • Min Operating Temperature

    -40°C

  • Additional Feature

    IT CAN ALSO OPERATE AT 3.3V

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    1.8V

  • Frequency

    1.8797GHz

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Pin Count

    100

  • Operating Supply Voltage

    1.8V

  • Max Supply Voltage

    1.89V

  • Min Supply Voltage

    1.71V

  • Memory Size

    1kB

  • Operating Supply Current

    40mA

  • Number of I/O

    80

  • Nominal Supply Current

    40mA

  • Memory Type

    FLASH

  • Propagation Delay

    7.5 ns

  • Turn On Delay Time

    7.5 ns

  • Frequency (Max)

    304MHz

  • Number of Logic Elements/Cells

    240

  • Number of Programmable I/O

    80

  • Number of Logic Blocks (LABs)

    24

  • Speed Grade

    5

  • Output Function

    MACROCELL

  • Number of Macro Cells

    192

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Radiation Hardening

    No

  • RoHS Status

    RoHS Compliant

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