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5M80ZM68I5N
  • 5M80ZM68I5N
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5M80ZM68I5N

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Manufacturer No:

5M80ZM68I5N

Manufacturer:

Altera

HK JDW NO:

2936-5M80ZM68I5N

Package:

TFBGA

Datasheet:

5M80ZM68I5N

Description:

PMIC 68 Pin 1.4749GHz 1.8V TFBGA

Quantity:

Add to RFQ list

In Stock : 999

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5M80ZM68I5N Overview


There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].As a result, it has 52 I/O ports programmed.The termination of a device is set to [0].BOTTOMis the terminal position of this electrical part.The device is powered by a voltage of 1.8V volts.It belongs to the family [0].In this chip, the 68pins are programmed.If you use this device, you will also find [0].The supply voltage should be maintained at 1.8V for high efficiency.It is adopted to store data in [0].This device is mounted by Surface Mount.This board has 68 pins.A maximum supply voltage of 1.89Vis used in its operation.Normally, it operates with a voltage of 1.71VV as its minimum supply voltage.A total of 52Programmable I/Os are present.It is possible to achieve a frequency of 1.4749GHz.The operating temperature should be higher than -40°C.It is recommended that the operating temperature be lower than 100°C.The logic block consists of 8 l logic blocks (LABs).As a fundamental building block, there are 80 logic elements/cells.It is recommended that the maximum frequency is less than 0.The devices contain a memory of 1kBfor storing programs and data.

5M80ZM68I5N Features


TFBGA package
52 I/Os
68 pin count
68 pins
8 logic blocks (LABs)

5M80ZM68I5N Applications


There are a lot of Altera 5M80ZM68I5N CPLDs applications.

  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • Configurable Addressing of I/O Boards
  • USB Bus
  • Reset swapping
  • High speed graphics processing
  • Voltage level translation
  • Code converters
  • Bootloaders for FPGAs
  • Custom state machines
  • STANDARD SERIAL INTERFACE UART
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

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Purchasing and Inquiry

Payment Method

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East West Bank charge US$30.00 banking fee.
The fee is charged according to the rule of PayPal.
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From $40.00 basic shipping fee depend on zone and country.
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

5M80ZM68I5N

technical specifications, attributes, parameters and parts with similar specifications to 5M80ZM68I5N.

  • Type
    Parameter
    Select All

  • Factory Lead Time

    12 Weeks

  • Mount

    Surface Mount

  • Package / Case

    TFBGA

  • Number of Pins

    68

  • Published

    2003

  • JESD-609 Code

    e1

  • Pbfree Code

    yes

  • Part Status

    Active

  • Number of Terminations

    68

  • ECCN Code

    EAR99

  • Terminal Finish

    TIN SILVER COPPER

  • Max Operating Temperature

    100°C

  • Min Operating Temperature

    -40°C

  • Additional Feature

    YES

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    1.8V

  • Frequency

    1.4749GHz

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Pin Count

    68

  • Qualification Status

    Not Qualified

  • Operating Supply Voltage

    1.8V

  • Temperature Grade

    INDUSTRIAL

  • Max Supply Voltage

    1.89V

  • Min Supply Voltage

    1.71V

  • Memory Size

    1kB

  • Operating Supply Current

    25μA

  • Number of I/O

    52

  • Nominal Supply Current

    25μA

  • Memory Type

    FLASH

  • Propagation Delay

    14 ns

  • Frequency (Max)

    152MHz

  • Number of Logic Elements/Cells

    80

  • Number of Programmable I/O

    52

  • Number of Logic Blocks (LABs)

    8

  • Speed Grade

    5

  • Output Function

    MACROCELL

  • Number of Macro Cells

    64

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    1.2mm

  • RoHS Status

    RoHS Compliant

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