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Home Home Integrated Circuits (ICs) CPLDs XC2C512-10PQ208C
XC2C512-10PQ208C
  • XC2C512-10PQ208C
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XC2C512-10PQ208C

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Manufacturer No:

XC2C512-10PQ208C

Manufacturer:

Xilinx

HK JDW NO:

903-XC2C512-10PQ208C

Package:

PQFP

Datasheet:

XC2C512-10PQ208C

Description:

0.5mm PMIC 208 Pin 1.8V PQFP

Quantity:

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In Stock : 999

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Product Details

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XC2C512-10PQ208C Overview


Currently, there are 512 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.There is a PQFP package containing it.There are 173 I/Os on the board.There are 208 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.Its terminal position is QUAD.Power is provided by a supply voltage of 1.8V volts.This part is included in Programmable Logic Devices.With 208pins programmed, the chip is ready to use.It is also characterized by YES.It is possible to construct digital circuits using 12000gates, which are devices that serve as building blocks.In order to maintain high efficiency, the supply voltage should be maintained at [0].The electronic part is mounted by Surface Mount.This board has 208 pins.In order to ensure proper operation, a maximum supply voltage (Vsup) of 1.9V is required.It is recommended that the operating temperature be greater than 0°C.It is recommended that the operating temperature be below 70°C.The program consists of 32 logic blocks (LABs).Maximum frequency should be less than 128MHz.Programmable logic types are divided into FLASH PLD.

XC2C512-10PQ208C Features


PQFP package
173 I/Os
208 pin count
208 pins
32 logic blocks (LABs)

XC2C512-10PQ208C Applications


There are a lot of Xilinx XC2C512-10PQ208C CPLDs applications.

  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Parity generators
  • Software-Driven Hardware Configuration
  • Power Meter SMPS
  • Field programmable gate
  • Digital systems
  • LED Lighting systems
  • Preset swapping
  • Address decoders
  • Protection relays
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Tell us the model and quantity you need, our sales staff will reply the price in time.
EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

2. Means of Payment

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East West Bank charge US$30.00 banking fee.
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

XC2C512-10PQ208C

technical specifications, attributes, parameters and parts with similar specifications to XC2C512-10PQ208C.

  • Type
    Parameter
    Select All

  • Mount

    Surface Mount

  • Package / Case

    PQFP

  • Number of Pins

    208

  • JESD-609 Code

    e0

  • Pbfree Code

    no

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    208

  • ECCN Code

    EAR99

  • Terminal Finish

    Tin/Lead (Sn85Pb15)

  • Max Operating Temperature

    70°C

  • Min Operating Temperature

    0°C

  • Additional Feature

    YES

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    QUAD

  • Terminal Form

    GULL WING

  • Peak Reflow Temperature (Cel)

    225

  • Supply Voltage

    1.8V

  • Terminal Pitch

    0.5mm

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Pin Count

    208

  • Qualification Status

    Not Qualified

  • Operating Supply Voltage

    1.8V

  • Supply Voltage-Max (Vsup)

    1.9V

  • Temperature Grade

    COMMERCIAL

  • Number of I/O

    173

  • Propagation Delay

    10 ns

  • Frequency (Max)

    128MHz

  • Programmable Logic Type

    FLASH PLD

  • Number of Gates

    12000

  • Number of Logic Blocks (LABs)

    32

  • Speed Grade

    10

  • Output Function

    MACROCELL

  • Number of Macro Cells

    512

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    4.1mm

  • Length

    28mm

  • Width

    28mm

  • RoHS Status

    Non-RoHS Compliant

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