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M5LV-256/104-10VI

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Manufacturer No:

M5LV-256/104-10VI

Manufacturer:

Lattice Semiconductor

HK JDW NO:

477-M5LV-256/104-10VI

Package:

144-LQFP

Datasheet:

M5LV-256/104-10VI

Description:

0.5mm PMIC MACH? 5 Series M5LV-256 144 Pin 3.3V 144-LQFP

Quantity:

In Stock : 999

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M5LV-256/104-10VI Overview


The mobile phone network has 256 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).It is contained in package [0].It is equipped with 104I/O ports.The termination of a device is set to [0].Its terminal position is QUAD.It is powered by a voltage of 3.3V volts.This part is included in Programmable Logic Devices.It is recommended that the chip be packaged by Tray.The device operates at a temperature of -40°C~85°C TAin order to ensure its reliability.It is recommended that Surface Mountholds the chip in place.The MACH? 5series comprises this type of FPGA.144pins are programmed on the chip.Additionally, this device is capable of displaying [0].The M5LV-256can be used to identify its related parts.It is possible to construct digital circuits using 10000gates, which are devices that serve as building blocks.If high efficiency is desired, the supply voltage should be kept at [0].For data storage, EEPROMis adopted.In this case, it is mounted by Surface Mount.The 144pins are designed into the board.A voltage of 3.6V is the maximum supply voltage for this device.The minimal supply voltage is 3V.A total of 208Programmable I/Os are present.It is recommended that the maximal frequency be lower than 83.3MHz.

M5LV-256/104-10VI Features


144-LQFP package
104 I/Os
The operating temperature of -40°C~85°C TA
144 pin count
144 pins

M5LV-256/104-10VI Applications


There are a lot of Lattice Semiconductor Corporation M5LV-256/104-10VI CPLDs applications.

  • STANDARD SERIAL INTERFACE UART
  • Page register
  • POWER-SAVING MODES
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • White goods (Washing, Cold, Aircon ,...)
  • PLC analog input modules
  • Dedicated input registers
  • Field programmable gate
  • I/O PORTS (MCU MODULE)
  • SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

M5LV-256/104-10VI

technical specifications, attributes, parameters and parts with similar specifications to M5LV-256/104-10VI.

  • Type
    Parameter
    Select All
  • Mount

    Surface Mount

  • Mounting Type

    Surface Mount

  • Package / Case

    144-LQFP

  • Number of Pins

    144

  • Operating Temperature

    -40°C~85°C TA

  • Packaging

    Tray

  • Published

    1995

  • Series

    MACH® 5

  • JESD-609 Code

    e0

  • Part Status

    Obsolete

  • Moisture Sensitivity Level (MSL)

    3 (168 Hours)

  • Number of Terminations

    144

  • ECCN Code

    EAR99

  • Terminal Finish

    Tin/Lead (Sn85Pb15)

  • Additional Feature

    YES

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    QUAD

  • Terminal Form

    GULL WING

  • Peak Reflow Temperature (Cel)

    225

  • Supply Voltage

    3.3V

  • Terminal Pitch

    0.5mm

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Base Part Number

    M5LV-256

  • Pin Count

    144

  • Operating Supply Voltage

    3.3V

  • Programmable Type

    In System Programmable

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    104

  • Memory Type

    EEPROM

  • Propagation Delay

    10 ns

  • Number of Gates

    10000

  • Max Frequency

    83.3MHz

  • Number of Programmable I/O

    208

  • Output Function

    MACROCELL

  • Number of Macro Cells

    256

  • JTAG BST

    YES

  • Voltage Supply - Internal

    3V~3.6V

  • Height Seated (Max)

    1.6mm

  • Length

    20mm

  • Width

    20mm

  • Radiation Hardening

    No

  • RoHS Status

    Non-RoHS Compliant

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