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LC4064ZC-5MN56I

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Manufacturer No:

LC4064ZC-5MN56I

Manufacturer:

Lattice Semiconductor

HK JDW NO:

477-LC4064ZC-5MN56I

Package:

56-LFBGA, CSPBGA

Datasheet:

LC4064ZC-5MN56I

Description:

0.5mm PMIC ispMACH? 4000Z Series LC4064 1.8V 56-LFBGA, CSPBGA

Quantity:

In Stock : 999

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LC4064ZC-5MN56I Overview


64macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.It is part of the 56-LFBGA, CSPBGA package.The device is programmed with 32 I/O ports.56terminations have been programmed into the device.This electrical part is wired with a terminal position of BOTTOM.An electrical supply voltage of 1.8V is used to power it.The part belongs to Programmable Logic Devices family.Trayis the packaging method.Ensure its reliability by operating at [0].Ensure that the chip is mounted by Surface Mount.The ispMACH? 4000Zseries comprises this type of FPGA.In this chip, the 56pins are programmed.If this device is used, you will also be able to find [0].LC4064contains its related parts.Optimal efficiency requires a supply voltage of [0].Data storage is performed using [0].A Surface Mountis mounted on this electronic component.This device operates at a voltage of 1.9Vas its maximum supply voltage.It operates with the minimal supply voltage of 1.7V.There are 484 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. It is important to make sure that the maximum frequency is less than 250MHz.A total of 12dedicated inputs are available for detecting the status of input signals.In order to form a fundamental building block, there are 4logic elements/cells.

LC4064ZC-5MN56I Features


56-LFBGA, CSPBGA package
32 I/Os
The operating temperature of -40°C~105°C TJ
56 pin count

LC4064ZC-5MN56I Applications


There are a lot of Lattice Semiconductor Corporation LC4064ZC-5MN56I CPLDs applications.

  • I2C BUS INTERFACE
  • Digital designs
  • PLC analog input modules
  • Software-Driven Hardware Configuration
  • Field programmable gate
  • STANDARD SERIAL INTERFACE UART
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • Custom state machines
  • I/O expansion
  • Page register
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

LC4064ZC-5MN56I

technical specifications, attributes, parameters and parts with similar specifications to LC4064ZC-5MN56I.

  • Type
    Parameter
    Select All
  • Factory Lead Time

    8 Weeks

  • Mount

    Surface Mount

  • Mounting Type

    Surface Mount

  • Package / Case

    56-LFBGA, CSPBGA

  • Operating Temperature

    -40°C~105°C TJ

  • Packaging

    Tray

  • Published

    2000

  • Series

    ispMACH® 4000Z

  • JESD-609 Code

    e1

  • Pbfree Code

    yes

  • Part Status

    Active

  • Moisture Sensitivity Level (MSL)

    3 (168 Hours)

  • Number of Terminations

    56

  • ECCN Code

    EAR99

  • Terminal Finish

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Additional Feature

    YES

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    1.8V

  • Terminal Pitch

    0.5mm

  • Reach Compliance Code

    not_compliant

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Base Part Number

    LC4064

  • Pin Count

    56

  • JESD-30 Code

    S-PBGA-B56

  • Qualification Status

    Not Qualified

  • Operating Supply Voltage

    1.8V

  • Programmable Type

    In System Programmable

  • Max Supply Voltage

    1.9V

  • Min Supply Voltage

    1.7V

  • Operating Supply Current

    80μA

  • Number of I/O

    32

  • Nominal Supply Current

    80μA

  • Memory Type

    EEPROM

  • Propagation Delay

    5 ns

  • Number of Logic Elements/Cells

    4

  • Max Frequency

    250MHz

  • Number of Programmable I/O

    484

  • Output Function

    MACROCELL

  • Number of Macro Cells

    64

  • JTAG BST

    YES

  • Number of Dedicated Inputs

    12

  • Voltage Supply - Internal

    1.7V~1.9V

  • Delay Time tpd(1) Max

    5ns

  • Height Seated (Max)

    1.35mm

  • Length

    6mm

  • Width

    6mm

  • RoHS Status

    ROHS3 Compliant

  • Lead Free

    Lead Free

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