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  • LAMXO256E-3TN100E

LAMXO256E-3TN100E

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Manufacturer No:

LAMXO256E-3TN100E

Manufacturer:

Lattice Semiconductor

HK JDW NO:

477-LAMXO256E-3TN100E

Package:

100-LQFP

Datasheet:

LAMXO256E-3TN100E

Description:

0.5mm PMIC LA-MachXO Series LAMXO256 100 Pin 1.2V 100-LQFP

Quantity:

In Stock : 999

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LAMXO256E-3TN100E Overview


There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is part of the 100-LQFP package.There are 78 I/Os on the board.The device is programmed with 100 terminations.The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.The device is powered by a voltage of 1.2V volts.This part is included in Field Programmable Gate Arrays.It is recommended that the chip be packaged by Tray.It operates with the operating temperature of -40°C~125°C TA to ensure its reliability.It is recommended that the chip be mounted by Surface Mount.FPGAs belonging to the LA-MachXOseries contain this type of chip.With 100pins programmed, the chip is ready to use.The LAMXO256indicates that its related parts can be found.In order to maintain high efficiency, the supply voltage should be maintained at [0].SRAM is adopted for storing data.A Surface Mountis mounted on this electronic component.There are 100 pins on the device.A voltage of 1.26V is the maximum supply voltage for this device.With a minimal supply voltage of [0], it operates.There are 32logic blocks (LABs) that make up its basic building block.As a fundamental building block, there are 256 logic elements/cells.Ideally, its clock frequency should not exceed 25MHz.Devices are equipped with a memory capacity of 256Bfor storing programs and data.This device has 78outputs configured.

LAMXO256E-3TN100E Features


100-LQFP package
78 I/Os
The operating temperature of -40°C~125°C TA
100 pin count
100 pins
32 logic blocks (LABs)
78 outputs

LAMXO256E-3TN100E Applications


There are a lot of Lattice Semiconductor Corporation LAMXO256E-3TN100E CPLDs applications.

  • DDC INTERFACE
  • Page register
  • Random logic replacement
  • Field programmable gate
  • Power up sequencing
  • State machine control
  • Parity generators
  • Configurable Addressing of I/O Boards
  • Portable digital devices
  • Software Configuration of Add-In Boards
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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3. RFQ (Request for Quotations)

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2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

4. Shipping Cost

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The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

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FedEx International, 5-7 business days.
The following are some common countries' logistic time.

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Payment Method

The fee is charged according to the rule of PayPal.
East West Bank charge US$30.00 banking fee.
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UPS(www.ups.com)
From $40.00 basic shipping fee depend on zone and country.
FedEx(www.fedex.com)
From $40.00 basic shipping fee depend on zone and country.
Registered Mail(www.singpost.com)
From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

LAMXO256E-3TN100E

technical specifications, attributes, parameters and parts with similar specifications to LAMXO256E-3TN100E.

  • Type
    Parameter
    Select All
  • Factory Lead Time

    8 Weeks

  • Mount

    Surface Mount

  • Mounting Type

    Surface Mount

  • Package / Case

    100-LQFP

  • Number of Pins

    100

  • Operating Temperature

    -40°C~125°C TA

  • Packaging

    Tray

  • Published

    2000

  • Series

    LA-MachXO

  • JESD-609 Code

    e3

  • Pbfree Code

    yes

  • Part Status

    Active

  • Moisture Sensitivity Level (MSL)

    3 (168 Hours)

  • Number of Terminations

    100

  • ECCN Code

    EAR99

  • Terminal Finish

    Matte Tin (Sn)

  • HTS Code

    8542.39.00.01

  • Subcategory

    Field Programmable Gate Arrays

  • Technology

    CMOS

  • Terminal Position

    QUAD

  • Terminal Form

    GULL WING

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    1.2V

  • Terminal Pitch

    0.5mm

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Base Part Number

    LAMXO256

  • Pin Count

    100

  • Number of Outputs

    78

  • Operating Supply Voltage

    1.2V

  • Programmable Type

    In System Programmable

  • Max Supply Voltage

    1.26V

  • Min Supply Voltage

    1.14V

  • Memory Size

    256B

  • Number of I/O

    78

  • Nominal Supply Current

    10mA

  • Memory Type

    SRAM

  • Clock Frequency

    25MHz

  • Propagation Delay

    4.9 ns

  • Turn On Delay Time

    4.9 ns

  • Number of Logic Elements/Cells

    256

  • Number of Logic Blocks (LABs)

    32

  • Output Function

    MACROCELL

  • Number of Macro Cells

    128

  • Number of Logic Cells

    256

  • Voltage Supply - Internal

    1.14V~1.26V

  • Height Seated (Max)

    1.6mm

  • Length

    14mm

  • Width

    14mm

  • Radiation Hardening

    No

  • RoHS Status

    ROHS3 Compliant

  • Lead Free

    Lead Free

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