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Home Home Integrated Circuits (ICs) CPLDs EPM7512AEQC208-12N
EPM7512AEQC208-12N
  • EPM7512AEQC208-12N
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EPM7512AEQC208-12N

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Manufacturer No:

EPM7512AEQC208-12N

Manufacturer:

Altera

HK JDW NO:

2936-EPM7512AEQC208-12N

Package:

PQFP

Datasheet:

EPM7512AEQC208-12N

Description:

0.5mm PMIC 208 Pin 100MHz 3.3V PQFP

Quantity:

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In Stock : 999

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Product Details

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EPM7512AEQC208-12N Overview


Currently, there are 512 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.You can find it in package [0].The device is programmed with 176 I/Os.It is programmed to terminate devices at [0].There is a QUADterminal position on the electrical part in question.There is 3.3V voltage supply for this device.It is a part of the family [0].It has 208pins programmed.10000gates are used to construct digital circuits.High efficiency requires the supply voltage to be maintained at [0].For data storage, EEPROMis adopted.Surface Mountis used to mount this electronic component.This board has 208 pins.A maximum voltage of 3.6Vis required for operation.It operates with the minimal supply voltage of 3V.In total, there are 176programmable I/Os.This frequency can be achieved at 100MHz.It is recommended that the operating temperature exceeds 0°C.It is recommended to keep the operating temperature below 70°C.In its simplest form, it consists of 32 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.In programmable logic, a type of logic can be categorized as EE PLD.

EPM7512AEQC208-12N Features


PQFP package
176 I/Os
208 pin count
208 pins
32 logic blocks (LABs)

EPM7512AEQC208-12N Applications


There are a lot of Altera EPM7512AEQC208-12N CPLDs applications.

  • Synchronous or asynchronous mode
  • I2C BUS INTERFACE
  • Software-driven hardware configuration
  • Parity generators
  • INTERRUPT SYSTEM
  • Random logic replacement
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • Preset swapping
  • Power automation
  • Storage Cards and Storage Racks
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM7512AEQC208-12N

technical specifications, attributes, parameters and parts with similar specifications to EPM7512AEQC208-12N.

  • Type
    Parameter
    Select All

  • Radiation Hardening

    No

  • RoHS Status

    RoHS Compliant

  • Factory Lead Time

    8 Weeks

  • Mount

    Surface Mount

  • Package / Case

    PQFP

  • Number of Pins

    208

  • Published

    1998

  • JESD-609 Code

    e3

  • Pbfree Code

    yes

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    208

  • ECCN Code

    3A991

  • Terminal Finish

    Matte Tin (Sn) - annealed

  • Max Operating Temperature

    70°C

  • Min Operating Temperature

    0°C

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    QUAD

  • Terminal Form

    GULL WING

  • Peak Reflow Temperature (Cel)

    245

  • Supply Voltage

    3.3V

  • Terminal Pitch

    0.5mm

  • Frequency

    100MHz

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Pin Count

    208

  • Operating Supply Voltage

    3.3V

  • Temperature Grade

    COMMERCIAL

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    176

  • Memory Type

    EEPROM

  • Propagation Delay

    12 ns

  • Turn On Delay Time

    12 ns

  • Frequency (Max)

    116.3MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    10000

  • Number of Programmable I/O

    176

  • Number of Logic Blocks (LABs)

    32

  • Speed Grade

    12

  • Output Function

    MACROCELL

  • Number of Macro Cells

    512

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    4.1mm

  • Length

    28mm

  • Width

    28mm

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