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Home Home Integrated Circuits (ICs) CPLDs EPM3512AFC256-7N
EPM3512AFC256-7N
  • EPM3512AFC256-7N
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EPM3512AFC256-7N

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Manufacturer No:

EPM3512AFC256-7N

Manufacturer:

Altera

HK JDW NO:

2936-EPM3512AFC256-7N

Package:

FBGA

Datasheet:

EPM3512AFC256-7N

Description:

1mm PMIC 256 Pin 166.67MHz 3.3V FBGA

Quantity:

Add to RFQ list

In Stock : 999

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EPM3512AFC256-7N Overview


There are 512 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a FBGA package containing it.As you can see, this device has 208 I/O ports programmed into it.There is a 256terminations set on devices.This electrical part has a terminal position of BOTTOMand is connected to the ground.Power is supplied by a voltage of 3.3V volts.This part is in the family [0].There are 256 pins on the chip.Additionally, this device is capable of displaying [0].There are 10000 gates, which are devices that acts as a building block for digital circuits. Optimal efficiency requires a supply voltage of [0].It is adopted to store data in [0].Surface Mountis the mounting point of this electronic part.The pins are [0].This device operates at a voltage of 3.6Vas its maximum supply voltage.The minimal supply voltage is 3V.Programmable I/Os are counted up 208.There is a maximum frequency of 166.67MHz.In order to operate properly, the operating temperature should be higher than 0°C.A temperature below 70°Cshould be used as the operating temperature.There are 32 logic blocks (LABs) in its basic building block.The maximum frequency should not exceed 116.3MHz.A programmable logic type is categorized as EE PLD.

EPM3512AFC256-7N Features


FBGA package
208 I/Os
256 pin count
256 pins
32 logic blocks (LABs)

EPM3512AFC256-7N Applications


There are a lot of Altera EPM3512AFC256-7N CPLDs applications.

  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • Bootloaders for FPGAs
  • Multiple DIP Switch Replacement
  • Battery operated portable devices
  • Page register
  • TIMERS/COUNTERS
  • Voltage level translation
  • Address decoding
  • Interface bridging
  • Portable digital devices
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

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From $40.00 basic shipping fee depend on zone and country.
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From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM3512AFC256-7N

technical specifications, attributes, parameters and parts with similar specifications to EPM3512AFC256-7N.

  • Type
    Parameter
    Select All

  • Mount

    Surface Mount

  • Package / Case

    FBGA

  • Number of Pins

    256

  • Published

    2009

  • JESD-609 Code

    e1

  • Pbfree Code

    yes

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    256

  • ECCN Code

    3A991

  • Terminal Finish

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Max Operating Temperature

    70°C

  • Min Operating Temperature

    0°C

  • Additional Feature

    YES

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    3.3V

  • Terminal Pitch

    1mm

  • Reach Compliance Code

    unknown

  • Frequency

    166.67MHz

  • Time@Peak Reflow Temperature-Max (s)

    40

  • Pin Count

    256

  • Qualification Status

    Not Qualified

  • Operating Supply Voltage

    3.3V

  • Temperature Grade

    COMMERCIAL

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    208

  • Memory Type

    EEPROM

  • Propagation Delay

    7.5 ns

  • Turn On Delay Time

    7.5 ns

  • Frequency (Max)

    116.3MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    10000

  • Number of Programmable I/O

    208

  • Number of Logic Blocks (LABs)

    32

  • Output Function

    MACROCELL

  • Number of Macro Cells

    512

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    3.5mm

  • Length

    17mm

  • Width

    17mm

  • RoHS Status

    RoHS Compliant

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