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  • EPM3064ALC44-7

EPM3064ALC44-7

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Manufacturer No:

EPM3064ALC44-7

Manufacturer:

Altera

HK JDW NO:

2936-EPM3064ALC44-7

Package:

PLCC

Datasheet:

EPM3064ALC44-7

Description:

PMIC 44 Pin 166.67MHz 3.3V PLCC

Quantity:

In Stock : 999

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EPM3064ALC44-7 Overview


There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).PLCCis the package in which it resides.The device is programmed with 34 I/Os.There are 44 terminations programmed into the device.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.The device is powered by a voltage of 3.3V volts.It is a part of family [0].It is packaged in the way of Bulk.In this chip, the 44pins are programmed.This device also displays [0].In digital circuits, there are 1250gates, which act as a basic building block.A high level of efficiency can be achieved by maintaining the supply voltage at [0].It is adopted to store data in [0].Surface Mountis the mounting point of this electronic part.The device is designed with pins [0].A maximum supply voltage of 3.6Vis used in its operation.With a minimal supply voltage of [0], it operates.A programmable I/O count of 34 has been recorded.There is 166.67MHz frequency that can be achieved.It is recommended that the operating temperature exceeds 0°C.It is recommended that the operating temperature be lower than 70°C.In total, it contains 4 logic blocks (LABs).It should be below 222.2MHzat the maximal frequency.It is possible to classify programmable logic as EE PLD.

EPM3064ALC44-7 Features


PLCC package
34 I/Os
44 pin count
44 pins
4 logic blocks (LABs)

EPM3064ALC44-7 Applications


There are a lot of Altera EPM3064ALC44-7 CPLDs applications.

  • TIMERS/COUNTERS
  • PLC analog input modules
  • DDC INTERFACE
  • Voltage level translation
  • Interface bridging
  • Dedicated input registers
  • Parity generators
  • INTERRUPT SYSTEM
  • D/T registers and latches
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM3064ALC44-7

technical specifications, attributes, parameters and parts with similar specifications to EPM3064ALC44-7.

  • Type
    Parameter
    Select All
  • Factory Lead Time

    10 Weeks

  • Mount

    Surface Mount

  • Package / Case

    PLCC

  • Number of Pins

    44

  • Packaging

    Bulk

  • Published

    1998

  • JESD-609 Code

    e0

  • Pbfree Code

    no

  • Moisture Sensitivity Level (MSL)

    1

  • Number of Terminations

    44

  • Terminal Finish

    Tin/Lead (Sn/Pb)

  • Max Operating Temperature

    70°C

  • Min Operating Temperature

    0°C

  • Additional Feature

    YES

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    QUAD

  • Terminal Form

    J BEND

  • Peak Reflow Temperature (Cel)

    220

  • Supply Voltage

    3.3V

  • Frequency

    166.67MHz

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Pin Count

    44

  • Operating Supply Voltage

    3.3V

  • Temperature Grade

    COMMERCIAL

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    34

  • Memory Type

    EEPROM

  • Propagation Delay

    7.5 ns

  • Turn On Delay Time

    7.5 ns

  • Frequency (Max)

    222.2MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    1250

  • Number of Programmable I/O

    34

  • Number of Logic Blocks (LABs)

    4

  • Speed Grade

    7

  • Output Function

    MACROCELL

  • Number of Macro Cells

    64

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Length

    16.5862mm

  • Width

    16.5862mm

  • Radiation Hardening

    No

  • RoHS Status

    RoHS Compliant

  • Lead Free

    Contains Lead

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