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XC2C64A-7QFG48I

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Manufacturer No:

XC2C64A-7QFG48I

Manufacturer:

Xilinx

HK JDW NO:

903-XC2C64A-7QFG48I

Package:

48-VFQFN Exposed Pad

Datasheet:

XC2C64A-7QFG48I

Description:

0.5mm Copper, Silver, Tin PMIC CoolRunner II Series XC2C64A 48 Pin 1.8V 48-VFQFN Exposed Pad

Quantity:

In Stock : 999

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XC2C64A-7QFG48I Overview


64macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.It is contained in package [0].The device is programmed with 37 I/Os.Devices are programmed with terminations of [0].This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.The power source is powered by 1.8Vvolts.This part is included in Programmable Logic Devices.As a result, it is packaged as Tray.It operates with the operating temperature of -40°C~85°C TA to ensure its reliability.Ensure that the chip is mounted by Surface Mount.As part of the CoolRunner IIseries, it is a type of FPGA.There are 48 pins on the chip.If this device is used, you will also be able to find [0].The XC2C64Aindicates that its related parts can be found.1500gates are devices that serve as building blocks for digital circuits.If high efficiency is desired, the supply voltage should be kept at [0].It is recommended to store data in [0].This device is mounted by Surface Mount.This board has 48 pins.A voltage of 1.9V is the maximum supply voltage for this device.With a minimal supply voltage of [0], it operates.In total, there are 4 logic elements/blocks.Ideally, the maximal frequency should be lower than 159MHz Hz.There are 2 logic blocks (LABs) in its basic building block.

XC2C64A-7QFG48I Features


48-VFQFN Exposed Pad package
37 I/Os
The operating temperature of -40°C~85°C TA
48 pin count
48 pins
2 logic blocks (LABs)

XC2C64A-7QFG48I Applications


There are a lot of Xilinx Inc. XC2C64A-7QFG48I CPLDs applications.

  • ToR/Aggregation/Core Switch and Router
  • Portable digital devices
  • Interface bridging
  • DMA control
  • STANDARD SERIAL INTERFACE UART
  • Programmable polarity
  • PLC analog input modules
  • Digital designs
  • State machine control
  • Multiple Clock Source Selection
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

4. Shipping Cost

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FedEx International, 5-7 business days.
The following are some common countries' logistic time.

Purchasing and Inquiry

Payment Method

The fee is charged according to the rule of PayPal.
East West Bank charge US$30.00 banking fee.
The fee is charged according to the rule of PayPal.
Western Union charge US$0.00 banking fee.

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DHL(www.dhl.com)
From $40.00 basic shipping fee depend on zone and country.
UPS(www.ups.com)
From $40.00 basic shipping fee depend on zone and country.
FedEx(www.fedex.com)
From $40.00 basic shipping fee depend on zone and country.
Registered Mail(www.singpost.com)
From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

XC2C64A-7QFG48I

technical specifications, attributes, parameters and parts with similar specifications to XC2C64A-7QFG48I.

  • Type
    Parameter
    Select All
  • Factory Lead Time

    10 Weeks

  • Contact Plating

    Copper, Silver, Tin

  • Mount

    Surface Mount

  • Mounting Type

    Surface Mount

  • Package / Case

    48-VFQFN Exposed Pad

  • Number of Pins

    48

  • Operating Temperature

    -40°C~85°C TA

  • Packaging

    Tray

  • Published

    2001

  • Series

    CoolRunner II

  • JESD-609 Code

    e3

  • Pbfree Code

    yes

  • Part Status

    Active

  • Moisture Sensitivity Level (MSL)

    3 (168 Hours)

  • Number of Terminations

    48

  • ECCN Code

    EAR99

  • Terminal Finish

    Matte Tin (Sn)

  • Additional Feature

    REAL DIGITAL DESIGN TECHNOLOGY

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    QUAD

  • Terminal Form

    NO LEAD

  • Peak Reflow Temperature (Cel)

    260

  • Supply Voltage

    1.8V

  • Terminal Pitch

    0.5mm

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Base Part Number

    XC2C64A

  • Pin Count

    48

  • Qualification Status

    Not Qualified

  • Operating Supply Voltage

    1.8V

  • Programmable Type

    In System Programmable

  • Max Supply Voltage

    1.9V

  • Min Supply Voltage

    1.7V

  • Number of I/O

    37

  • Memory Type

    ROMless

  • Propagation Delay

    7.5 ns

  • Turn On Delay Time

    7.5 ns

  • Number of Gates

    1500

  • Max Frequency

    159MHz

  • Number of Logic Blocks (LABs)

    2

  • Speed Grade

    7

  • Output Function

    MACROCELL

  • Number of Macro Cells

    64

  • JTAG BST

    YES

  • Voltage Supply - Internal

    1.7V~1.9V

  • Delay Time tpd(1) Max

    6.7ns

  • Number of Logic Elements/Blocks

    4

  • Height Seated (Max)

    1mm

  • RoHS Status

    ROHS3 Compliant

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United Kingdom/GBP Summary
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