STM32U585QII3

Includes ST state-of-the-art patented

technology

Ultra-low-power with FlexPowerControl

• 1.71 V to 3.6 V power supply

• –40 °C to +85/125 °C temperature range

• Low-power background autonomous mode

(LPBAM): autonomous peripherals with DMA,

functional down to Stop 2 mode

• VBAT mode: supply for RTC, 32 x 32-bit backup

registers and 2-Kbyte backup SRAM

• 160 nA Shutdown mode (24 wakeup pins)

• 210 nA Standby mode (24 wakeup pins)

• 440 nA Standby mode with RTC

• 1.9 μA Stop 3 mode with 16-Kbyte SRAM

• 4.3 µA Stop 3 mode with full SRAM

• 4.0 µA Stop 2 mode with 16-Kbyte SRAM

• 8.95 µA Stop 2 mode with full SRAM

• 19.5 μA/MHz Run mode @ 3.3 V

Core

• Arm® 32-bit Cortex®-M33 CPU with

TrustZone®, MPU, DSP, and FPU

ART Accelerator

• 8-Kbyte instruction cache allowing 0-wait-state

execution from Flash and external memories:

up to 160 MHz, 240 DMIPS

• 4-Kbyte data cache for external memories

Power management

• Embedded regulator (LDO) and SMPS

step-down converter supporting switch

on-the-fly and voltage scaling

Benchmarks

• 1.5 DMIPS/MHz (Drystone 2.1)

 651 CoreMark® (4.07 CoreMark®/MHz)

• 535 ULPMark™-CP

• 149 ULPMark™-PP

• 58.2 ULPMark™-CM

• 133000 SecureMark™-TLS

Memories

• 2-Mbyte Flash memory with ECC, 2 banks

read-while-write, including 512 Kbytes with

100 kcycles

• 786-Kbyte SRAM with ECC OFF or 722-Kbyte

SRAM including up to 322-Kbyte SRAM with

ECC ON

• External memory interface supporting SRAM,

PSRAM, NOR, NAND and FRAM memories

• 2 Octo-SPI memory interfaces

Security and cryptography

• PSA level 3 and SESIP level 3 certified

• Arm® TrustZone® and securable I/Os,

memories and peripherals

• Flexible life cycle scheme with RDP and

password protected debug

• Root of trust thanks to unique boot entry and

secure hide protection area (HDP)

• Secure firmware installation (SFI) thanks to

embedded root secure services (RSS)

• Secure data storage with hardware unique key

(HUK)

• Secure firmware upgrade support with TF-M